About Positron AI
Positron AI specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron AI exists to create the world's best AI inference systems.
Role Overview
We are looking for a Senior Technical Program Manager to own and drive three critical, concurrent workstreams at the intersection of hardware and software delivery:
- Customer Deployments — Lead end-to-end programs for deploying Positron’s inference platform into customer environments, including hyperscalers and enterprise partners. Coordinate cross-functional execution across hardware, firmware, software, and partner integration teams to hit aggressive milestones from initial qualification through production ramp.
- ASIC Emulation Software Deliverables — Drive the software deliverables required for ASIC emulation, including boot and runtime software that runs in the emulation environment itself, test infrastructure, validation environments, and tooling that enable pre-silicon software development and verification. Ensure the emulation software pipeline stays ahead of silicon timelines.
- ASIC Software Releases (Pre- and Post-Silicon) — Own the program management of ASIC software releases across the full silicon lifecycle—from early bring-up and emulation through tapeout, first silicon, and production software milestones. Define release timelines and scope for each release, and coordinate dependencies across compiler, runtime, driver, firmware, and platform software teams.
This role sits within the Accelerator Platform Software (APS) organization and supports the broader Positron Software organization. It requires a TPM who thrives at the boundary of hardware and software, is comfortable with ambiguity, and can impose structure and accountability on complex, multi-team programs. A central responsibility across all three workstreams is managing the dependencies between hardware and software teams to ensure aligned delivery.
- Own integrated program plans for customer deployments, including hyperscalers, coordinating deliverables across silicon, platform software, firmware, infrastructure, and partner-facing teams.
- Define and manage release timelines, scope, and schedules for all ASIC software deliverables—pre-silicon (emulation, simulation, FPGA prototyping) and post-silicon (bring-up, validation, production releases).
- Build and maintain a cross-functional dependency map that connects hardware milestones (tapeout, first silicon, qualification) to software readiness gates.
- Manage dependencies between hardware and software teams across all workstreams, ensuring alignment on deliverables, handoffs, and integration schedules.
- Drive weekly program reviews, track risks and blockers, and escalate with clarity and context to engineering leadership.
- Partner with the customer’s technical program and engineering teams to manage joint milestones, deliverable handoffs, and integration checkpoints.
- Establish and enforce release processes including branching strategy, qualification criteria, regression gates, and release notes for ASIC software drops.
- Coordinate emulation platform resource allocation, boot and runtime software delivery, test scheduling, and environment readiness to maximize pre-silicon software velocity.
- Create transparency across the organization through dashboards, status reports, and structured communication cadences.
- Identify process gaps and implement lightweight, high-signal mechanisms that improve execution without adding bureaucracy.
- Support hiring and onboarding as the Positron Software organization scales significantly.
- 8+ years of technical program management experience in semiconductor, systems, or infrastructure software companies.
- Direct experience managing programs that span ASIC/silicon development and software delivery—ideally across pre-silicon emulation through post-silicon production.
- Track record of managing large-scale customer or partner deployment programs (hyperscaler experience strongly preferred).
- Deep familiarity with silicon development milestones (RTL freeze, tapeout, A0/B0 silicon, qualification) and how software delivery maps to them.
- Strong understanding of systems software stacks: compilers, runtimes, drivers, firmware, and platform/infrastructure software.
- Demonstrated ability to build program structure in fast-moving, ambiguous environments—startup experience is a strong plus.
- Excellent written and verbal communication; ability to present program status and risks clearly to executives, partners, and engineers alike.
- BS or MS in Computer Science, Electrical Engineering, or a related technical field.
- Experience with AI/ML inference or training hardware platforms (GPUs, TPUs, custom ASICs).
- Familiarity with FPGA-based emulation platforms (Palladium, Veloce, or similar) and associated software workflows.
- Background in managing software release processes for embedded or hardware-adjacent software.
- Experience with agile/flow-based project management tools (Notion, Jira, Linear) in engineering organizations.
- Prior work at or with major hyperscalers (AWS, Azure, GCP) or cloud infrastructure providers.
- Comfort with technical depth—ability to read architecture docs, participate in design reviews, and challenge engineering assumptions constructively.
Leveling & Scope
While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.
Lead at the Intersection of Silicon and Software: Own the critical path for an industry-defining AI accelerator. You won’t just manage tasks; you’ll synchronize the complex dance between hardware milestones and software readiness that brings next-generation LLM performance to life.
Drive Hyperscale Impact: Be the primary architect of execution for deploying Positron’s platform into the world’s largest data centers. You will have a front-row seat—and a hands-on role—in scaling AI infrastructure for global enterprise partners and hyperscalers.
Master Pre- and Post-Silicon Complexity: Challenge yourself with a role that spans the entire lifecycle, from high-stakes ASIC emulation and pre-silicon validation to the adrenaline of first-silicon bring-up and production releases.
High Agency, High Velocity: Join a team that values "high-signal" execution over bureaucracy. As a Senior TPM, you will have the autonomy to build program structures from the ground up, imposing order on ambiguity in a fast-moving startup environment.
Collaborate with World-Class Experts: Partner with elite silicon, compiler, and systems engineers who are redefining the limits of inference. You’ll be the glue that holds these cross-functional powerhouses together to deliver a seamless, integrated product.
Compensation and Benefits
The base salary range for this role is $150,000 – $300,000.
Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.
At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.
Equal Opportunity Employer. If you’re excited about the role but don’t meet every bullet, we’d still love to hear from you.
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